Light-emitting display device having oxide semiconductor layer overlapping with adjacent pixel electrode

ABSTRACT

An object is to provide a light-emitting display device in which a pixel including a thin film transistor using an oxide semiconductor has a high aperture ratio. The light-emitting display device includes a plurality of pixels each including a thin film transistor and a light-emitting element. The pixel is electrically connected to a first wiring functioning as a scan line. The thin film transistor includes an oxide semiconductor layer over the first wiring with a gate insulating film therebetween. The oxide semiconductor layer is extended beyond the edge of a region where the first wiring is provided. The light-emitting element and the oxide semiconductor layer overlap with each other.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a divisional of U.S. application Ser. No.13/936,355, filed Jul. 8, 2013, now U.S. Pat. No. 9,318,654 which is acontinuation of U.S. application Ser. No. 12/897,299, filed Oct. 4,2010, now U.S. Pat. No. 8,482,004, which claims the benefit of a foreignpriority application filed in Japan as Serial No. 2009-235180 on Oct. 9,2009, all of which are incorporated by reference.

TECHNICAL FIELD

The present invention relates to a light-emitting display device. Inaddition, the present invention relates to an electronic deviceincluding the light-emitting display device.

BACKGROUND ART

A thin film transistor formed over a flat plate such as a glasssubstrate is manufactured using amorphous silicon or polycrystallinesilicon, as typically seen in a liquid crystal display device. A thinfilm transistor manufactured using amorphous silicon has low fieldeffect mobility, but can be formed over a larger glass substrate. Incontrast, a thin film transistor manufactured using crystalline siliconhas high field effect mobility, but needs a crystallization step such aslaser annealing and is not always suitable for a larger glass substrate.

In view of the above, attention has been drawn to a technique by which athin film transistor is manufactured using an oxide semiconductor andapplied to an electronic device or an optical device. For example,Patent Document 1 discloses a technique by which a thin film transistoris manufactured using zinc oxide or an In—Ga—Zn—O-based oxidesemiconductor for an oxide semiconductor film and such a transistor isused as a switching element or the like of a light-emitting displaydevice.

REFERENCE

Patent Document 1: Japanese Published Patent Application No. 2009-031750

DISCLOSURE OF INVENTION

The field effect mobility of a thin film transistor in which an oxidesemiconductor is used for a channel region is higher than that of a thinfilm transistor in which amorphous silicon is used for a channel region.A pixel including such a thin film transistor formed using an oxidesemiconductor is expected to be applied to a light-emitting displaydevice such as an EL display. Furthermore, although the area per pixelis expected to decrease in a higher value-added light-emitting displaydevice such as a 3D display or a 4K2K display, a light-emitting displaydevice including a pixel with increased aperture ratio is desired.

In view of the foregoing, an object of the present invention is toprovide a light-emitting display device in which a pixel including athin film transistor using an oxide semiconductor has a high apertureratio.

According to one embodiment of the present invention, a light-emittingdisplay device includes a pixel including a thin film transistor and alight-emitting element. The pixel is electrically connected to a firstwiring functioning as a scan line. The thin film transistor includes anoxide semiconductor layer over the first wiring with a gate insulatingfilm therebetween. The oxide semiconductor layer is extended beyond theedge of a region where the first wiring is provided. The light-emittingelement and the oxide semiconductor layer overlap with each other.

According to one embodiment of the present invention, a light-emittingdisplay device includes a pixel including a thin film transistor and alight-emitting element. The pixel is electrically connected to a firstwiring functioning as a scan line and a second wiring functioning as asignal line. The thin film transistor includes an oxide semiconductorlayer over the first wiring with a gate insulating film therebetween.The oxide semiconductor layer is extended beyond the edge of a regionwhere the first wiring is provided. The second wiring is extended overthe gate insulating film over the first wiring and is on and in contactwith the oxide semiconductor layer. The light-emitting element and theoxide semiconductor layer overlap with each other.

According to one embodiment of the present invention, a light-emittingdisplay device includes a thin film transistor and a light-emittingelement. The pixel is electrically connected to a first wiringfunctioning as a scan line and a second wiring functioning as a signalline. The thin film transistor includes an oxide semiconductor layerover the first wiring with a gate insulating film therebetween. Theoxide semiconductor layer is extended beyond the edge of a region wherethe first wiring is provided. The second wiring is extended over thegate insulating film over the first wiring and an interlayer insulatinglayer over the gate insulating film, and is on and in contact with theoxide semiconductor layer. The light-emitting element and the oxidesemiconductor layer overlap with each other.

According to one embodiment of the present invention, a light-emittingdisplay device includes a pixel including a first thin film transistor,a second thin film transistor, and a light-emitting element. The pixelis electrically connected to a first wiring functioning as a scan lineand a second wiring functioning as a signal line. The first thin filmtransistor includes an oxide semiconductor layer over the first wiringwith a gate insulating film therebetween. The oxide semiconductor layeris extended beyond the edge of a region where the first wiring isprovided. The second wiring is extended over the gate insulating filmover the first wiring and is on and in contact with the oxidesemiconductor layer. A third wiring that is in contact with the oxidesemiconductor layer and electrically connects the first thin filmtransistor and the second thin film transistor is extended over the gateinsulating film over the first wiring. The light-emitting element andthe oxide semiconductor layer overlap with each other.

According to one embodiment of the present invention, a light-emittingdisplay device includes a thin film transistor and a light-emittingelement. The pixel is electrically connected to a first wiringfunctioning as a scan line and a second wiring functioning as a signalline. The thin film transistor includes an oxide semiconductor layerover the first wiring with a gate insulating film therebetween. Theoxide semiconductor layer is extended beyond the edge of a region wherethe first wiring is provided. The second wiring is extended over thegate insulating film over the first wiring and an interlayer insulatinglayer over the gate insulating film, and is on and in contact with theoxide semiconductor layer. A third wiring that is in contact with theoxide semiconductor layer and electrically connects the first thin filmtransistor and the second thin film transistor is extended over the gateinsulating film over the first wiring and the interlayer insulatinglayer over the gate insulating film. The light-emitting element and theoxide semiconductor layer overlap with each other.

It is possible to increase the aperture ratio of a pixel including athin film transistor in which an oxide semiconductor is used. Thus, alight-emitting display device can include a high definition displayportion.

BRIEF DESCRIPTION OF DRAWINGS

In the accompanying drawings:

FIGS. 1A and 1B are a top view and a cross-sectional view of alight-emitting display device;

FIGS. 2A to 2C are cross-sectional views of a light-emitting displaydevice;

FIGS. 3A and 3B are top views each illustrating a light-emitting displaydevice;

FIGS. 4A and 4B are a top view and a cross-sectional view of alight-emitting display device;

FIGS. 5A and 5B are top views each illustrating a light-emitting displaydevice;

FIGS. 6A and 6B are a top view and a cross-sectional view of alight-emitting display device;

FIG. 7 is a circuit diagram of a light-emitting display device;

FIG. 8 is a circuit diagram of a light-emitting display device;

FIG. 9 is a cross-sectional view of a light-emitting display device;

FIGS. 10A to 10C each illustrate an electronic device;

FIGS. 11A to 11C each illustrate an electronic device; and

FIGS. 12A and 12B are a top view and a cross-sectional view of alight-emitting display device.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be described in detail withreference to the accompanying drawings. The present invention is notlimited to the following description, and it is easily understood bythose skilled in the art that modes and details disclosed herein can bemodified in various ways without departing from the spirit and the scopeof the present invention. Therefore, the present invention is not to beconstrued as being limited to the content of the embodiments includedherein. Note that in the structures of the present invention describedbelow, the same reference numerals are used for the same portions andportions having similar functions in different drawings, and thedescription thereof is not repeated.

Note that the size, the thickness of a layer, or a region of eachstructure illustrated in drawings in this specification is exaggeratedfor simplicity in some cases. Therefore, embodiments of the presentinvention are not limited to such scales.

Note that the terms such as “first”, “second”, and “third” used in thisspecification are used in order to avoid confusion of structuralelements and do not mean limitation of the number of the structuralelements. Therefore, for example, the term “first” can be replaced withthe term “second”, “third”, or the like as appropriate.

Embodiment 1

In this embodiment, a light-emitting display device will be describedusing a pixel that includes a thin film transistor (hereinafter alsoreferred to as a TFT) and a light-emitting element connected to the TFT,as an example. Note that a pixel refers to an element group that iscomposed of elements provided in each pixel of a display device, forexample, elements for controlling display in accordance with an electricsignal, such as a thin film transistor, a light-emitting element, and awiring. A pixel may include a color filter or the like and maycorrespond to one color component whose brightness can be controlledwith one pixel. Therefore, for example, in a color display deviceincluding color elements of R, G, and B, a minimum unit of an image iscomposed of three pixels of an R pixel, a G pixel, and a B pixel and animage can be obtained with a plurality of pixels.

Note that a light-emitting element includes a light-emitting layerbetween a pair of electrodes (an anode and a cathode), and is formed bystacking an element included in the light-emitting layer over one of theelectrodes. In this specification, one of electrodes of a light-emittingelement shown in a drawing is sometimes referred to as a “light-emittingelement”.

Note that when it is described that “A and B are connected”, the casewhere A and B are electrically connected to each other, and the casewhere A and B are directly connected to each other are included therein.Here, A and B are each an object having an electrical function.Specifically, the description “A and B are connected” includes the casewhere a portion between A and B can be regarded as one node inconsideration of circuit operation, for example, the case where A and Bare connected through a switching element such as a transistor and havethe same or substantially the same potentials by conduction of theswitching element, and the case where A and B are connected through aresistor and the potential difference generated at opposite ends of theresistor does not adversely affect the operation of a circuit includingA and B.

FIG. 1A is a top view of a pixel. A TFT illustrated in FIG. 1A has akind of bottom-gate structure called an inverted staggered structure inwhich a wiring layer serving as a source electrode and a drain electrodeof the TFT is placed opposite to an oxide semiconductor layer serving asa channel region, with respect to a wiring serving as a gate.

A pixel 100 illustrated in FIG. 1A includes a first wiring 101Afunctioning as a scan line, a second wiring 102A functioning as a signalline, a first oxide semiconductor layer 103A, a second oxidesemiconductor layer 103B, a power supply line 104A, a capacitorelectrode 101B, and a light-emitting element 105. Moreover, the pixel100 in FIG. 1A includes a third wiring 102B for electrically connectingthe first oxide semiconductor layer 103A and the capacitor electrode101B, so that a first thin film transistor 107A is formed. Furthermore,the pixel 100 in FIG. 1A includes a fourth wiring 104B for electricallyconnecting the second oxide semiconductor layer 103B and thelight-emitting element 105, so that a second thin film transistor 107Bis formed.

A partition 106 for separating light-emitting elements for each pixel isprovided over the first wiring 101A, the second wiring 102A, the thirdwiring 102B, the fourth wiring 104B, the first oxide semiconductor layer103A, the second oxide semiconductor layer 103B, the power supply line104A, and the capacitor electrode 101B. Note that the light-emittingelement 105 connected to the fourth wiring 104B is surrounded by thepartition 106.

The first wiring 101A also functions as a gate of the first thin filmtransistor 107A. The capacitor electrode 101B is also a wiring thatfunctions as a gate of the second thin film transistor 107B and oneelectrode of a capacitor. The second wiring 102A also functions as oneof a source electrode and a drain electrode of the first thin filmtransistor 107A. The third wiring 102B also functions as the other ofthe source electrode and the drain electrode of the first thin filmtransistor 107A. The power supply line 104A is also a wiring thatfunctions as one of a source electrode and a drain electrode of thesecond thin film transistor 107B and the other electrode of thecapacitor. The fourth wiring 104B also functions as the other of thesource electrode and the drain electrode of the second thin filmtransistor 107B.

Note that the first wiring 101A and the capacitor electrode 101B areformed from the same layer; the second wiring 102A, the third wiring102B, the power supply line 104A, and the fourth wiring 104B are formedfrom the same layer. In addition, the power supply line 104A and thecapacitor electrode 101B partly overlap with each other to form astorage capacitor of the second thin film transistor 107B.

The first oxide semiconductor layer 103A included in the first thin filmtransistor 107A is provided over the first wiring 101A with a gateinsulating film (not illustrated) therebetween. The first oxidesemiconductor layer 103A is extended beyond the edge of a region wherethe first wiring 101A is provided and the partition 106.

Note that the description “A is extended beyond the edge of B” meansthat, when stacked A and B are seen in a top view, edges of A and B arenot aligned and A is extended outward so that the edge of A is placedoutside the edge of B.

Note that the pixel may include a plurality of thin film transistors inaddition to the first thin film transistor 107A and the second thin filmtransistor 107B. Note that the first thin film transistor 107A has afunction of selecting a pixel including the first thin film transistor107A, and is also referred to as a selection transistor. The second thinfilm transistor 107B has a function of controlling a current flowing tothe light-emitting element 105 in a pixel including the second thin filmtransistor 107B, and is also referred to as a driving transistor.

FIG. 1B illustrates a cross-sectional structure along chain lines A-A′,B-B′, and C-C′ in FIG. 1A. In the cross-sectional structure illustratedin FIG. 1B, the first wiring 101A serving as the gate and the capacitorelectrode 101B are provided over a substrate 111 with a base film 112therebetween. A gate insulating film 113 is provided so as to cover thefirst wiring 101A and the capacitor electrode 101B. The first oxidesemiconductor layer 103A and the second oxide semiconductor layer 103Bare provided over the gate insulating film 113. The second wiring 102Aand the third wiring 102B are provided over the first oxidesemiconductor layer 103A, and the power supply line 104A and the fourthwiring 104B are provided over the second oxide semiconductor layer 103B.An oxide insulating layer 114 functioning as a passivation film isprovided over the first oxide semiconductor layer 103A, the second oxidesemiconductor layer 103B, the second wiring 102A, the third wiring 102B,the power supply line 104A, and the fourth wiring 104B. The partition106 is provided over the oxide insulating layer 114 over the firstwiring 101A, the second wiring 102A, the third wiring 102B, the fourthwiring 104B, the first oxide semiconductor layer 103A, the second oxidesemiconductor layer 103B, the power supply line 104A, and the capacitorelectrode 101B. An opening portion is formed in the oxide insulatinglayer 114 over the fourth wiring 104B. The electrode of thelight-emitting element 105 and the fourth wiring 104B are connected inthe opening portion. In the cross section along chain line B-B′, thethird wiring 102B and the capacitor electrode 101B are connected throughan opening portion formed in the gate insulating film 113.

Note that the pixel illustrated in FIGS. 1A and 1B is placed in a matrixlike a plurality of pixels 701 over a substrate 700 illustrated in FIG.7. FIG. 7 illustrates a structure in which a pixel portion 702, a scanline driver circuit 703, and a signal line driver circuit 704 are placedover the substrate 700. Whether the pixels 701 are in a selected stateor in a non-selected state is determined per row in accordance with ascan signal supplied from the first wiring 101A connected to the scanline driver circuit 703. The pixel 701 selected by the scan signal issupplied with a video voltage (also referred to as an image signal, avideo signal, or video data) from the second wiring 102A connected tothe signal line driver circuit 704. Moreover, the pixel 701 is connectedto the power supply line 104A that is extended from a power supplycircuit 705 provided outside the substrate 700.

FIG. 7 illustrates the structure in which the scan line driver circuit703 and the signal line driver circuit 704 are provided over thesubstrate 700; alternatively, one of the scan line driver circuit 703and the signal line driver circuit 704 may be provided over thesubstrate 700. Only the pixel portion 702 may be provided over thesubstrate 700. Furthermore, FIG. 7 illustrates the structure in whichthe power supply circuit 705 is provided outside the substrate 700;alternatively, the power supply circuit 705 may be provided over thesubstrate 700.

FIG. 7 illustrates an example in which the plurality of pixels 701 arearranged in a matrix (in stripe) in the pixel portion 702. Note that thepixels 701 are not necessarily arranged in a matrix and may be arrangedin a delta pattern or Bayer arrangement. As a display method of thepixel portion 702, a progressive method or an interlace method can beemployed. Note that color elements controlled in the pixel for colordisplay are not limited to three colors of R (red), G (green), and B(blue), and color elements of more than three colors may be employed,for example, RGBW (W corresponds to white), or RGB added with one ormore of yellow, cyan, magenta, and the like. Further, the size ofdisplay regions may be different between dots of color elements.

FIG. 7 illustrates the first wirings 101A, the second wirings 102A, andthe power supply lines 104A corresponding to the number of pixels in therow direction and column direction. Note that the numbers of the firstwirings 101A, the second wirings 102A, and the power supply lines 104Amay be increased depending on the number of sub-pixels included in onepixel or the number of transistors in the pixel. The pixels 701 may bedriven with the first wiring 101A, the second wiring 102A, and the powersupply line 104A shared with some pixels.

Note that FIG. 1A illustrates the TFT in which the second wiring 102A isrectangular; alternatively, the second wiring 102A may surround thethird wiring 102B (specifically, the second wiring 102A may be U-shapedor C-shaped) so that the area of a region where carriers move isincreased to increase the amount of current flowing.

Note that the width of the first wiring 101A except a region to be thefirst thin film transistor 107A may be reduced so that the first wiring101A is partly narrow. When the width of the first wiring is reduced,the aperture ratio of the pixel can be increased.

Note that the aperture ratio represents the area of a region throughwhich light is transmitted, per pixel. Therefore, the aperture ratio isdecreased as a region occupied by components that do not transmit lightis increased, whereas the aperture ratio is increased as a regionoccupied by components that transmit light is increased. In alight-emitting display device, the aperture ratio is increased in such amanner that a wiring or the like that does not transmit light is placedso as not to overlap with a region occupied by a light-emitting elementprovided inside a partition or the size of thin film transistors isreduced.

Note that a thin film transistor is an element having at least threeterminals of a gate, a drain, and a source. The thin film transistor hasa channel region between a drain region and a source region, and currentcan flow through the drain region, the channel region, and the sourceregion. Here, since the source and the drain of the transistor maychange depending on the structure, the operating condition, and the likeof the transistor, it is difficult to define which is a source or adrain. Therefore, a region functioning as a source or a drain is notcalled the source or the drain in some cases. In such a case, forexample, one of the source and the drain is referred to as a firstterminal, a first electrode, or a first region and the other of thesource and the drain is referred to as a second terminal, a secondelectrode, or a second region in some cases.

Next, a method for manufacturing the pixel according to the top view andthe cross-sectional view illustrated in FIGS. 1A and 1B will bedescribed with reference to FIGS. 2A to 2C.

A glass substrate can be used as the light-transmitting substrate 111.FIG. 2A illustrates a structure in which the base film 112 is providedover the substrate 111 in order to prevent diffusion of impurities fromthe substrate 111 or improve adhesion between the substrate 111 andelements provided over the substrate 111. Note that the base film 112 isnot necessarily provided.

Next, a conductive layer is formed over the entire surface of thesubstrate 111. After that, a first photolithography step is performed sothat a resist mask is formed and unnecessary portions are removed byetching, whereby the first wiring 101A and the capacitor electrode 101Bare formed. At this time, etching is performed so that at least edges ofthe first wiring 101A and the capacitor electrode 101B are tapered.

The first wiring 101A and the capacitor electrode 101B are preferablyformed using a low-resistance conductive material such as aluminum (Al)or copper (Cu). Since the use of aluminum alone has disadvantages suchas low heat resistance and a tendency to be corroded, aluminum is usedin combination with a conductive material having heat resistance. As theconductive material having heat resistance, it is possible to use anelement selected from titanium (Ti), tantalum (Ta), tungsten (W),molybdenum (Mo), chromium (Cr), neodymium (Nd), and scandium (Sc); analloy containing any of these elements as its component; an alloycontaining a combination of any of these elements; or a nitridecontaining any of these elements as its component.

Note that the wiring and the like included in the TFT can be formed byan inkjet method or a printing method. Thus, the wiring and the like canbe formed at room temperature, can be formed at a low vacuum, or can beformed using a large substrate. Since the wirings and the like can bemanufactured without using a photomask, a layout of the transistor canbe changed easily. Further, it is not necessary to use a resist, so thatmaterial costs are reduced and the number of steps can be reduced. Inaddition, a resist mask and the like can also be formed by an inkjetmethod or a printing method. When a resist is formed only over intendedportions by an inkjet method or a printing method and exposed to lightand developed to form a resist mask, costs can be reduced as compared tothe case where a resist is formed over the entire surface.

A resist mask having regions with a plurality of thicknesses (typically,two kinds of thicknesses) may be formed using a multi-tone mask to formwirings and the like.

Then, an insulating film (hereinafter referred to as the gate insulatingfilm 113) is formed over the entire surface of the first wiring 101A andthe capacitor electrode 101B. The gate insulating film 113 is formed bya sputtering method or the like.

For example, as the gate insulating film 113, a silicon oxide film isformed by a sputtering method. It is needless to say that the gateinsulating film 113 is not limited to such a silicon oxide film and maybe formed with a single-layer structure or a layered structure ofanother insulating film such as a silicon oxynitride film, a siliconnitride film, an aluminum oxide film, or a tantalum oxide film.

Note that before the deposition of an oxide semiconductor, dust attachedto a surface of the gate insulating film 113 is preferably removed byreverse sputtering in which an argon gas is introduced to generateplasma. Note that a nitrogen atmosphere, a helium atmosphere, or thelike may be used instead of an argon atmosphere. An argon atmosphere towhich oxygen, N₂O, or the like is added may be used. Alternatively, anargon atmosphere to which Cl₂, CF₄, or the like is added may be used.

After the plasma treatment on the surface of the gate insulating film113, an oxide semiconductor is deposited over the gate insulating film113 without being exposed to the air. By the use of the oxidesemiconductor for a semiconductor layer of the transistor, thefield-effect mobility can be made higher than that of the case where asilicon-based semiconductor material such as amorphous silicon is used.Note that examples of the oxide semiconductor are zinc oxide (ZnO) andtin oxide (SnO₂). Moreover, In, Ga, or the like can be added to ZnO.

For the oxide semiconductor, a thin film represented by InMO₃(ZnO)_(x)(x>0) can be used. Note that M denotes one or more of metal elementsselected from gallium (Ga), iron (Fe), nickel (Ni), manganese (Mn), andcobalt (Co). For example, M denotes Ga in some cases; meanwhile, Mdenotes the above metal element such as Ni or Fe in addition to Ga (Gaand Ni or Ga and Fe) in other cases. Further, the above oxidesemiconductor may contain a transitional metal element such as Fe or Nior an oxide of the transitional metal as an impurity element in additionto the metal element contained as M. For example, an In—Ga—Zn—O-basedfilm can be used as the oxide semiconductor layer.

As the oxide semiconductor (InMO₃(ZnO)_(x) (x>0) film), anInMO₃(ZnO)_(x) (x>0) film in which M is a different metal element may beused instead of the In—Ga—Zn—O-based film. Besides the above, thefollowing oxide semiconductors can be used as the oxide semiconductor:an In—Sn—Zn—O-based oxide semiconductor; an In—Al—Zn—O-based oxidesemiconductor; a Sn—Ga—Zn—O-based oxide semiconductor; anAl—Ga—Zn—O-based oxide semiconductor; a Sn—Al—Zn—O-based oxidesemiconductor; an In—Zn—O-based oxide semiconductor; a Sn—Zn—O-basedoxide semiconductor; an Al—Zn—O-based oxide semiconductor; an In—O-basedoxide semiconductor; a Sn—O-based oxide semiconductor; and a Zn—O-basedoxide semiconductor.

Note that an In—Ga—Zn—O-based oxide semiconductor is used as the oxidesemiconductor in this embodiment. Here, a target in which In₂O₃, Ga₂O₃,and ZnO are contained at ratio of 1:1:1 is used. The oxide semiconductoris deposited under the following conditions: the distance between thesubstrate and the target is 100 mm, the pressure is 0.6 Pa, the directcurrent (DC) power is 0.5 kW, and the atmosphere is an oxygen atmosphere(the flow rate of oxygen is 100%). Note that a pulsed direct current(DC) power supply is preferably used because powder substances (alsoreferred to as particles or dust) generated in film deposition can bereduced and the film thickness can be uniform.

Note that a chamber used for depositing the oxide semiconductor may bethe same or different from the chamber where the reverse sputtering isperformed previously.

Examples of a sputtering method are an RF sputtering method in which ahigh-frequency power supply is used as a sputtering power supply, a DCsputtering method in which a direct-current power supply is used, and apulsed DC sputtering method in which a bias is applied in a pulsedmanner. An RF sputtering method is mainly used for forming an insulatingfilm, and a DC sputtering method is mainly used for forming a metalfilm.

In addition, there is also a multi-source sputtering apparatus in whicha plurality of targets of different materials can be set. With themulti-source sputtering apparatus, films of different materials can beformed to be stacked in the same chamber, or a film of plural kinds ofmaterials can be formed by electric discharge at the same time in thesame chamber.

Further, there are a sputtering apparatus that is provided with a magnetsystem inside the chamber and employs a magnetron sputtering, and asputtering apparatus employing an ECR sputtering in which plasmagenerated with the use of microwaves is used without using glowdischarge.

Furthermore, examples of a deposition method by sputtering are areactive sputtering method in which a target substance and a sputteringgas component chemically react with each other during deposition to forma thin compound film thereof, and a bias sputtering in which voltage isalso applied to a substrate during deposition.

Next, the oxide semiconductor layer is subjected to dehydration ordehydrogenation. The temperature of first heat treatment for dehydrationor dehydrogenation is higher than or equal to 400° C. and lower than750° C., preferably higher than or equal to 425° C. and lower than 750°C. Note that the heat treatment may be performed for one hour or shorterwhen the temperature of the heat treatment is 425° C. or higher; theheat treatment is preferably performed for longer than one hour when thetemperature is lower than 425° C. Here, the substrate is introduced intoan electric furnace, which is one of heat treatment apparatuses, andheat treatment is performed on the oxide semiconductor layer in anitrogen atmosphere. Then, the oxide semiconductor layer is not exposedto air, which prevents water or hydrogen from entering the oxidesemiconductor layer, so that the oxide semiconductor layer is obtained.In this embodiment, slow cooling is performed in one furnace from theheating temperature T at which dehydration or dehydrogenation isperformed on the oxide semiconductor layer to a temperature low enoughto prevent entry of water; specifically, the slow cooling is performedin a nitrogen atmosphere until the temperature drops by 100° C. or morefrom the heating temperature T. Without being limited to a nitrogenatmosphere, dehydration or dehydrogenation may be performed in a raregas atmosphere (e.g., helium, neon, or argon).

The heat treatment apparatus is not limited to an electric furnace andmay be provided with a device that heats an object to be processed bythermal conduction or thermal radiation from a heater such as aresistance heater. For example, a rapid thermal annealing (RTA)apparatus such as a gas rapid thermal annealing (GRTA) apparatus or alamp rapid thermal annealing (LRTA) apparatus can be used. An LRTAapparatus is an apparatus for heating an object to be processed byradiation of light (an electromagnetic wave) emitted from a lamp such asa halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arclamp, a high pressure sodium lamp, or a high pressure mercury lamp. AGRTA apparatus is an apparatus for performing heat treatment using ahigh-temperature gas. As the gas, an inert gas that hardly reacts withan object by heat treatment, for example, nitrogen or a rare gas such asargon is used.

When the oxide semiconductor layer is subjected to heat treatment at atemperature of 400° C. or higher and lower than 750° C., dehydration ordehydrogenation of the oxide semiconductor layer can be achieved; thus,water (H₂O) can be prevented from being contained again in the oxidesemiconductor layer in a later step.

In the first heat treatment, water, hydrogen, and the like are notpreferably contained in nitrogen or a rare gas such as helium, neon, orargon. It is preferable that the purity of nitrogen or the rare gas suchas helium, neon, or argon which is introduced into a heat treatmentapparatus be set to be 6N (99.9999%) or higher, preferably 7N(99.99999%) or higher (i.e., the impurity concentration is 1 ppm orlower, preferably 0.1 ppm or lower).

Note that the oxide semiconductor layer may be crystallized to be amicrocrystalline film or a polycrystalline film depending on thecondition of the first heat treatment or the material of the oxidesemiconductor layer. For example, the oxide semiconductor layer may becrystallized to be a microcrystalline oxide semiconductor film having adegree of crystallization of 90% or more, or 80% or more. Furthermore,the oxide semiconductor layer may be an amorphous oxide semiconductorfilm containing no crystalline component, depending on the condition ofthe first heat treatment or the material of the oxide semiconductorlayer.

After the first heat treatment for dehydration or dehydrogenation, theoxide semiconductor layer becomes an oxygen-deficient type and theresistance of the oxide semiconductor layer is decreased. The carrierconcentration of the oxide semiconductor layer after the first heattreatment is higher than that of the oxide semiconductor film just afterbeing deposited, and the oxide semiconductor layer preferably has acarrier concentration of 1×10¹⁸/cm³ or higher.

Next, a second photolithography step is performed so that a resist maskis formed and unnecessary portions are removed by etching, whereby thefirst oxide semiconductor layer 103A and the second oxide semiconductorlayer 103B formed using the oxide semiconductor are formed. The firstheat treatment for the first oxide semiconductor layer 103A and thesecond oxide semiconductor layer 103B may be performed on the oxidesemiconductor film that has not yet been processed into theisland-shaped oxide semiconductor layer. Wet etching or dry etching isemployed as an etching method at this time. FIG. 2A is a cross-sectionalview at this stage.

Note that after the deposition of the gate insulating film 113, anopening portion 121 that reaches the capacitor electrode 101B may beformed in the gate insulating film 113 as illustrated in FIG. 2A so thata wiring to be formed later can be connected to the capacitor electrode.

Then, a conductive film is formed from a metal material over the oxidesemiconductor layer by a sputtering method or a vacuum evaporationmethod. Examples of a material for the conductive film are an elementselected from Al, Cr, Ta, Ti, Mo, and W; an alloy containing any of theabove elements as its component; and an alloy containing a combinationof any of the above elements. Further, in the case where heat treatmentat 200° C. to 600° C. is performed, the conductive film preferably hasheat resistance for such heat treatment. Since the use of Al alonebrings disadvantages such as low heat resistance and a tendency to becorroded, aluminum is used in combination with a conductive materialhaving heat resistance. As the conductive material having heatresistance which is used in combination with Al, any of the followingmaterials can be used: an element selected from titanium (Ti), tantalum(Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd), andscandium (Sc); an alloy containing any of these above elements as acomponent; an alloy containing these elements in combination; and anitride containing any of these above elements as a component.

Here, the conductive film has a single-layer structure of a titaniumfilm. The conductive film may have a two-layer structure, and a titaniumfilm may be stacked over an aluminum film. Alternatively, the conductivefilm may have a three-layer structure in which a Ti film, an aluminumfilm containing Nd (an Al—Nd film), and a Ti film are stacked in thisorder. The conductive film may have a single-layer structure of analuminum film containing silicon.

Next, a third photolithography step is performed so that a resist maskis formed and unnecessary portions are removed by etching, whereby thesecond wiring 102A, the third wiring 102B, the power supply line 104A,and the fourth wiring 104B made of the conductive film are formed. Wetetching or dry etching is employed as an etching method at this time.For example, when a conductive film of Ti is etched with wet etchingusing an ammonia peroxide mixture (hydrogen peroxide of 31 wt %:ammoniaof 28 wt %:water=5:2:2), the first oxide semiconductor layer 103A andthe second oxide semiconductor layer 103B can be left while the secondwiring 102A, the third wiring 102B, the power supply line 104A, and thefourth wiring 104B are partly etched.

An exposed region of the oxide semiconductor layer is sometimes etchedin the third photolithography step depending on the etching conditions.In this case, the thickness of the first oxide semiconductor layer 103Ain a region between the second wiring 102A and the third wiring 102B issmaller than that of the first oxide semiconductor layer 103A over thefirst wiring 101A in a region overlapping with the second wiring 102A orthe third wiring 102B. Moreover, the thickness of the second oxidesemiconductor layer 103B in a region between the power supply line 104Aand the fourth wiring 104B is smaller than that of the second oxidesemiconductor layer 103B over the capacitor electrode 101B in a regionwhere overlapping with the power supply line 104A or the fourth wiring104B.

Then, the oxide insulating layer 114 is formed over the gate insulatingfilm 113, the first oxide semiconductor layer 103A, the second oxidesemiconductor layer 103B, the second wiring 102A, the third wiring 102B,the power supply line 104A, and the fourth wiring 104B. At this stage,part of the first oxide semiconductor layer 103A and part of the secondoxide semiconductor layer 103B are in contact with the oxide insulatinglayer 114. Note that a region of the first oxide semiconductor layer103A that overlaps with the first wiring 101A and a region of the secondoxide semiconductor layer 103B that overlaps with the capacitorelectrode 101B, with the gate insulating film 113 therebetween, serve aschannel formation regions.

The oxide insulating layer 114 can be formed to a thickness of at least1 nm by a method with which impurities such as water or hydrogen are notmixed into the oxide insulating layer, such as a sputtering method, asappropriate. In this embodiment, a silicon oxide film is formed by asputtering method as the oxide insulating layer. The substratetemperature in film formation is higher than or equal to roomtemperature and lower than or equal to 300° C., and is 100° C. in thisembodiment. The silicon oxide film can be formed by a sputtering methodin a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or amixed atmosphere of a rare gas (typically, argon) and oxygen. As atarget, a silicon oxide target or a silicon target can be used. Forexample, with the use of a silicon target, a silicon oxide film can beformed by a sputtering method in an atmosphere of oxygen and a rare gas.As the oxide insulating layer which is formed in contact with the oxidesemiconductor layer whose resistance is reduced, an inorganic insulatingfilm that does not include impurities such as moisture, a hydrogen ion,and OH⁻ and blocks entry of these impurities from the outside is used.Specifically, a silicon oxide film, a silicon nitride oxide film, analuminum oxide film, or an aluminum oxynitride film is used. Note thatan oxide insulating layer formed by a sputtering method is particularlydense and even a single layer of the oxide insulating layer can be usedas a protective film for preventing diffusion of impurities into a layerin contact therewith. A target doped with phosphorus (P) or boron (B)can be used so that phosphorus (P) or boron (B) is added to the oxideinsulating layer.

In this embodiment, the oxide insulating layer 114 is formed by a pulsedDC sputtering method using a columnar polycrystalline, boron-dopedsilicon target that has a purity of 6N and a resistivity of 0.01 Ωcm inthe following conditions: the distance between the substrate and thetarget (T-S distance) is 89 mm, the pressure is 0.4 Pa, thedirect-current (DC) power supply is 6 kW, and the atmosphere is oxygen(the oxygen flow rate is 100%). The thickness of the oxide insulatinglayer 114 is 300 nm.

Note that the oxide insulating layer 114 is provided on and in contactwith a region serving as the channel formation region of the oxidesemiconductor layer and also functions as a channel protective layer.

Next, second heat treatment (preferably at 200° C. to 400° C., forexample, 250° C. to 350° C.) may be performed in an inert gas atmosphereor a nitrogen atmosphere. For example, the second heat treatment isperformed at 250° C. for one hour in a nitrogen atmosphere. By thesecond heat treatment, heat is applied while part of the first oxidesemiconductor layer 103A and part of the second oxide semiconductorlayer 103B are in contact with the oxide insulating layer 114.

When the second heat treatment is performed while the first oxidesemiconductor layer 103A and the second oxide semiconductor layer 103B,the resistance of each of which is reduced by the first heat treatment,are in contact with the oxide insulating layer 114, a region that is incontact with the oxide insulating layer 114 becomes deficient in oxygen.Thus, the region in the first oxide semiconductor layer 103A and thesecond oxide semiconductor layer 103B in contact with the oxideinsulating layer 114 becomes an i-type region (i.e., the resistance ofthe region is increased) toward the depth direction of the first oxidesemiconductor layer 103A and the second oxide semiconductor layer 103B.

Then, an opening portion 122 is formed in the insulating layer 114 by afourth photolithography method. FIG. 2B is a cross-sectional view atthis stage.

Next, a light-transmitting conductive film is formed to be connected tothe fourth wiring 104B. The light-transmitting conductive film is formedusing indium oxide (In₂O₃), an alloy of indium oxide and tin oxide(In₂O₃—SnO₂, abbreviated as ITO), or the like by a sputtering method, avacuum evaporation method, or the like. Alternatively, an Al—Zn—O-basedfilm containing nitrogen, that is, an Al—Zn—O—N-based film, a Zn—O-basedfilm containing nitrogen, or a Sn—Zn—O-based film containing nitrogenmay be used. Note that the composition ratio (atomic %) of zinc in theAl—Zn—O—N-based film is less than or equal to 47 atomic % and is higherthan that of aluminum in the film; the composition ratio (atomic %) ofaluminum in the film is higher than that of nitrogen in the film. Such amaterial is etched with a hydrochloric acid-based solution. However,since a residue is easily generated particularly in etching ITO, analloy of indium oxide and zinc oxide (In₂O₃—ZnO) may be used to improveetching processability.

Note that the unit of the percentage of components in thelight-transmitting conductive film is atomic percent (atomic %), and thepercentage of components is evaluated by analysis using an electronprobe X-ray microanalyzer (EPMA).

Next, a fifth photolithography step is performed so that a resist maskis formed and unnecessary portions are removed by etching, therebyforming one of electrodes of the light-emitting element. Thelight-emitting element includes a pair of electrodes (an anode and acathode) and a light-emitting layer between the pair of electrodes, andis formed by stacking elements included in the light-emitting layer overone of the pair of electrodes. Therefore, one of the pair of electrodesof the light-emitting element is referred to as the light-emittingelement 105.

Next, the partition 106 for separating light-emitting elements for eachpixel is provided over the first wiring 101A, the second wiring 102A,the third wiring 102B, the fourth wiring 104B, the first oxidesemiconductor layer 103A, the second oxide semiconductor layer 103B, thepower supply line 104A, and the capacitor electrode 101B. Note that thelight-emitting element 105 connected to the fourth wiring 104B isprovided inside the partition 106. FIG. 2C illustrates a cross-sectionalview at this stage.

In such a manner, the pixel including the first thin film transistor107A and the second thin film transistor 107B can be manufactured.Moreover, the pixels are arranged in a matrix to form a pixel portion,whereby an active-matrix light-emitting display device can bemanufactured.

Advantages of the structure in this embodiment illustrated in FIGS. 1Aand 1B and FIGS. 2A to 2C will be described in detail with reference toFIGS. 3A and 3B.

FIGS. 3A and 3B are each a magnified view of the vicinity of the oxidesemiconductor layer in the top view in FIG. 1A. A diagram in which thewidth (W1 in FIG. 3A) of the first oxide semiconductor layer 103A inFIG. 3A is increased corresponds to FIG. 3B illustrating the width (W2in FIG. 3B) of the first oxide semiconductor layer 103A.

As illustrated in FIGS. 3A and 3B, the first oxide semiconductor layer103A in the top view of the pixel in FIG. 1A of this embodiment isprovided over the first wiring 101A without separating another wiringfrom the first wiring 101A. A channel region formed in the oxidesemiconductor layer between the second wiring 102A and the third wiring102B is formed in a region overlapping the first wiring 101A. Sincecharacteristics of the TFT might vary when light is emitted to thechannel region, the first oxide semiconductor layer 103A needs to bewell shielded from light by a wiring separated from the first wiring101A, which results in a reduction in aperture ratio of the pixel. Incontrast, the aperture ratio can be increased with the structure in thisembodiment, in which the oxide semiconductor layer is provided so as tooverlap the first wiring 101A and a wiring separated from the firstwiring 101A is not formed.

Moreover, by using a light-transmitting oxide semiconductor layer as thesemiconductor layer of the thin film transistor, display can beperformed without a reduction in aperture ratio even if the oxidesemiconductor layer is shifted from an intended region overlapping withthe first wiring 101A and thus overlaps with the light-emitting element105.

When the oxide semiconductor layer is formed with a pattern larger thana predetermined size, favorable display can be performed without amalfunction and a reduction in aperture ratio even if the oxidesemiconductor layer is formed in a portion that is slightly shifted fromthe intended position. An active-matrix substrate for the light-emittingdisplay device can be easily manufactured, and the yield can beincreased.

Next, a specific example of a top view of the case where storagecapacitance is reduced by using a thin film transistor including anoxide semiconductor layer will be described.

A current (hereinafter referred to as a leakage current) flowing througha thin film transistor including an oxide semiconductor when a gate issupplied with a voltage that makes the transistor turn off is 0.1 pA orless, whereas that of a thin film transistor including amorphous siliconis about several hundreds of nanoamperes. For that reason, in the thinfilm transistor including an oxide semiconductor, storage capacitancecan be reduced. In other words, the degree of freedom for layout ofelements in a pixel including a thin film transistor including an oxidesemiconductor can be improved as compared to that in a pixel including athin film transistor including amorphous silicon.

It is possible to omit a storage capacitor of a thin film transistorincluding an oxide semiconductor layer because the leakage current ofthe thin film transistor is extremely small. Specifically, FIGS. 12A and12B illustrate a top view and a cross-sectional view in the case where astorage capacitor is omitted. The top view of a pixel illustrated inFIG. 12A corresponds to a view in which a capacitor line is eliminatedfrom the top view in FIG. 1A. As seen from the top view in FIG. 12A andthe cross-sectional view in FIG. 12B, by using a thin film transistorincluding an oxide semiconductor layer, the third wiring 102B and thelike that are led can be shortened with the placement of the second thinfilm transistor; thus, the aperture ratio can be increased.

As described above, the structure described in this embodiment makes itpossible to increase the aperture ratio of a pixel including a thin filmtransistor in which an oxide semiconductor is used. Thus, alight-emitting display device can include a high definition displayportion.

This embodiment can be implemented in combination with any of thestructures described in the other embodiments as appropriate.

Embodiment 2

An example in which a pixel in a display device includes a TFT having astructure different from that in Embodiment 1 will be described below.

FIG. 4A is a top view of a pixel having a structure different from thatin Embodiment 1. A TFT illustrated in FIG. 4A is a kind of bottom-gatestructure called an inverted staggered structure in which a wiring layerserving as a source electrode and a drain electrode of the TFT is placedopposite to an oxide semiconductor layer serving as a channel region,with respect to a wiring serving as a gate.

A pixel 400 illustrated in FIG. 4A includes a first wiring 401Afunctioning as a scan line, a second wiring 402A functioning as a signalline, a first oxide semiconductor layer 403A, a second oxidesemiconductor layer 403B, a power supply line 404A, a capacitorelectrode 401B, and a light-emitting element 405. Moreover, the pixel400 includes a third wiring 402B for electrically connecting the firstoxide semiconductor layer 403A and the capacitor electrode 401B, so thata first thin film transistor 407A is formed. Furthermore, the pixel 400includes a fourth wiring 404B for electrically connecting the secondoxide semiconductor layer 403B and the light-emitting element 405, sothat a second thin film transistor 407B is formed. A partition 406 forseparating light-emitting elements for each pixel is provided over thefirst wiring 401A, the second wiring 402A, the third wiring 402B, thefourth wiring 404B, the first oxide semiconductor layer 403A, the secondoxide semiconductor layer 403B, the power supply line 404A, and thecapacitor electrode 401B. Note that the light-emitting element 405connected to the fourth wiring 404B is provided inside the partition406.

The first wiring 401A also functions as a gate of the first thin filmtransistor 407A. The capacitor electrode 401B is also a wiring thatfunctions as a gate of the second thin film transistor 407B and oneelectrode of a storage capacitor. The second wiring 402A also functionsas one of a source electrode and a drain electrode of the first thinfilm transistor 407A. The third wiring 402B also functions as the otherof the source electrode and the drain electrode of the first thin filmtransistor 407A. The power supply line 404A is also a wiring thatfunctions as one of a source electrode and a drain electrode of thesecond thin film transistor 407B and the other electrode of the storagecapacitor. The fourth wiring 404B also functions as the other of thesource electrode and the drain electrode of the second thin filmtransistor 407B.

Note that the first wiring 401A and the capacitor electrode 401B areformed from the same layer; the second wiring 402A, the third wiring402B, the power supply line 404A, and the fourth wiring 404B are formedfrom the same layer. In addition, the power supply line 404A and thecapacitor electrode 401B partly overlap with each other to form thestorage capacitor of the second thin film transistor 407B. Note that thefirst oxide semiconductor layer 403A included in the first thin filmtransistor 407A is provided over the first wiring 401A with a gateinsulating film (not illustrated) therebetween, and extended beyond theedge of a region where the first wiring 401A and the partition 406 areprovided.

FIG. 4B illustrates a cross-sectional structure along chain lines A-A′,B-B′, and C-C′ in FIG. 4A. In the cross-sectional structure illustratedin FIG. 4B, the first wiring 401A serving as the gate and the capacitorelectrode 401B are provided over a substrate 411 with a base film 412therebetween. A gate insulating film 413 is provided so as to cover thefirst wiring 401A and the capacitor electrode 401B. The first oxidesemiconductor layer 403A and the second oxide semiconductor layer 403Bare provided over the gate insulating film 413. The second wiring 402Aand the third wiring 402B are provided over the first oxidesemiconductor layer 403A, and the power supply line 404A and the fourthwiring 404B are provided over the second oxide semiconductor layer 403B.An oxide insulating layer 414 functioning as a passivation film isprovided over the first oxide semiconductor layer 403A, the second oxidesemiconductor layer 403B, the second wiring 402A, the third wiring 402B,the power supply line 404A, and the fourth wiring 404B. The partition406 is provided over the oxide insulating layer 414 over the firstwiring 401A, the second wiring 402A, the third wiring 402B, the fourthwiring 404B, the first oxide semiconductor layer 403A, the second oxidesemiconductor layer 403B, the power supply line 404A, and the capacitorelectrode 401B. An opening portion is formed in the oxide insulatinglayer 414 over the fourth wiring 404B. The electrode of thelight-emitting element 405 and the fourth wiring 404B are connected inthe opening portion. In the cross section along chain line B-B′, thethird wiring 402B and the capacitor electrode 401B are connected throughan opening portion formed in the gate insulating film 413.

Note that as in the description of FIGS. 1A and 1B in Embodiment 1, thepixel illustrated in FIGS. 4A and 4B is placed over the substrate 700 inFIG. 7 as the plurality of pixels 701 arranged in a matrix. Thedescription of FIG. 7 is similar to that in Embodiment 1.

Moreover, the cross-sectional view in FIG. 4B is similar to thecross-sectional view in FIG. 1B, and the description of a method forforming a pixel is similar to the description of FIGS. 2A to 2C inEmbodiment 1.

Advantages of the structure in this embodiment illustrated in FIGS. 4Aand 4B will be described in detail with reference to FIGS. 5A and 5B.

FIGS. 5A and 5B are each a magnified view of the vicinity of the oxidesemiconductor layer in the top view in FIG. 4A. A diagram in which thewidth (W1 in FIG. 5A) of the first oxide semiconductor layer 403A inFIG. 5A is increased corresponds to FIG. 5B illustrating the width (W2in FIG. 5B) of the first oxide semiconductor layer 403A.

As illustrated in FIGS. 5A and 5B, the first oxide semiconductor layer403A in the top view of the pixel in FIG. 4A of this embodiment isprovided over the first wiring 401A without separating another wiringfrom the first wiring 401A. A channel region formed in the oxidesemiconductor layer between the second wiring 402A and the third wiring402B is formed in a region overlapping the first wiring 401A. Inaddition, the first oxide semiconductor layer 403A in this embodiment isextended over the gate insulating film over the first wiring 401A and isin contact with the second wiring 402A and the third wiring 402B.

Since characteristics of the TFT might vary when light is emitted to thechannel region, the first oxide semiconductor layer 403A needs to bewell shielded from light by a wiring separated from the first wiring401A, which results in a reduction in aperture ratio of the pixel. Incontrast, the aperture ratio can be increased with the structure in thisembodiment, in which the oxide semiconductor layer is provided so as tooverlap the first wiring 401A and a wiring separated from the firstwiring 401A is not formed; and the second wiring 402A and the thirdwiring 402B are extended over the gate insulating film over the firstwiring 401A so as to be in contact with the first oxide semiconductorlayer 403A.

Moreover, by using a light-transmitting oxide semiconductor layer as thesemiconductor layer of the thin film transistor, display can beperformed without a reduction in aperture ratio even if the oxidesemiconductor layer is shifted from an intended region overlapping withthe first wiring 401A and thus overlaps with the light-emitting element405.

Note that the second wiring 402A and the third wiring 402B extended overthe first wiring 401A illustrated in FIG. 4A overlaps the first wiring401A. The second wiring 402A and the third wiring 402B may be placed ina meander pattern or may be provided linearly.

When the oxide semiconductor layer is formed with a pattern larger thana predetermined size, favorable display can be performed without amalfunction and a reduction in aperture ratio even if the oxidesemiconductor layer is formed in a portion that is slightly shifted fromthe intended position. An active-matrix substrate for the light-emittingdisplay device can be easily manufactured, and the yield can beincreased.

As described above, the structure in this embodiment makes it possibleto increase the aperture ratio of a pixel including a thin filmtransistor in which an oxide semiconductor is used. Thus, alight-emitting display device can include a high definition displayportion.

This embodiment can be implemented in combination with any of thestructures described in the other embodiments as appropriate.

Embodiment 3

An example in which a pixel in a display device includes a TFT having astructure different from those in Embodiments 1 and 2 will be describedbelow.

FIGS. 6A and 6B are a top view and a cross-sectional view of a pixelthat has a structure different from that in Embodiment 2. Note that thestructure in the top view of FIG. 6A is similar to that of FIG. 4A;therefore, the description is not repeated. The structure in thecross-sectional view of FIG. 6B is different from the structure in thecross-sectional view of FIG. 4B in that an interlayer insulating layer601A is provided between the first wiring 401A and the second wiring402A, and that an interlayer insulating layer 601B is provided betweenthe first wiring 401A and the third wiring 402B.

When the second wiring 402A and the third wiring 402B are extended overthe first wiring 401A, parasitic capacitance might be generated betweenthe first wiring 401A and the second wiring 402A, between the firstwiring 401A and the third wiring 402B, and between the first wiring 401Aand the power supply line 404A, depending on the thickness of the gateinsulating film 413. The interlayer insulating layers 601A and 601B areprovided as illustrated in FIG. 6B, whereby the parasitic capacitancecan be reduced and defects such as a malfunction can be reduced.

As described above, the structure described in this embodiment makes itpossible to increase the aperture ratio of a pixel including a thin filmtransistor in which an oxide semiconductor is used. Moreover, in thisembodiment, it is possible to achieve the reduction in parasiticcapacitance in addition to the advantages in Embodiment 2. Thus, it ispossible to provide a light-emitting display device in which amalfunction is less likely to occur and which includes a high definitiondisplay portion.

Embodiment 4

In this embodiment, a structure of a light-emitting element which is adisplay element will be described.

FIG. 9 illustrates an embodiment of a cross-sectional structure of alight-emitting element connected to a thin film transistor. Thelight-emitting element is provided by a stack of a first electrode 911,an EL layer 913 including a light-emitting layer, and a second electrode914 in this order. One of the first electrode 911 and the secondelectrode 914 functions as an anode and the other functions as acathode. Holes injected from the anode and electrons injected from thecathode are recombined in the light-emitting layer included in the ELlayer, whereby the light-emitting element emits light. The firstelectrode 911 of the light-emitting element is connected to the thinfilm transistor 107B formed over the substrate 111. The partition 106 isprovided so as to cover the first electrode 911 and one of theelectrodes serving as the source or the drain of the thin filmtransistor 107B. The EL layer 913 is provided in an opening portion inthe partition 106 over the first electrode 911. The second electrode 914is provided so as to cover the EL layer 913 and the partition 106. Notethat the thin film transistor in Embodiment 1 is used in thisembodiment; the thin film transistor shown in any of the otherembodiments can be used.

The first electrode 911 or the second electrode 914 is formed using ametal, an alloy, or a conductive compound.

For example, the first electrode 911 or the second electrode 914 can beformed using a metal, an alloy, a conductive compound, or the like thathas a high work function (a work function of 4.0 eV or more).Specifically, it is possible to use a layer of a light-transmittingconductive metal oxide such as indium oxide-tin oxide (ITO: indium tinoxide), indium tin oxide containing silicon or silicon oxide, indiumoxide-zinc oxide (IZO: indium zinc oxide), or indium oxide containingtungsten oxide and zinc oxide (IWZO).

Moreover, the first electrode 911 or the second electrode 914 can beformed using a metal, an alloy, a conductive compound, or the like thathas a low work function (typically, a work function of 3.8 eV or less).Specifically, it is possible to use any of the following materials, forexample: elements that belong to Group 1 or Group 2 of the periodictable (i.e., an alkali metal such as lithium and cesium and analkaline-earth metal such as magnesium, calcium, and strontium) and analloy of such an element (e.g., an alloy of aluminum, magnesium, andsilver and an alloy of aluminum and lithium); and a rare earth metal(e.g., europium and ytterbium) and an alloy of such an element.

A film of an alkali metal, an alkaline-earth metal, or an alloy thereofis formed by a vacuum evaporation method, a sputtering method, or thelike. Further, silver paste or the like can be applied by an inkjetmethod and baked to form the first electrode 911 or the second electrode914. The first electrode 911 and the second electrode 914 are notlimited to a single layer and can have a layered structure.

In order to extract light emitted from the EL layer to the outside, oneof or both the first electrode 911 and the second electrode 914 is/areformed so as to transmit light emitted from the EL layer. When only thefirst electrode 911 has light-transmitting properties, light passes thefirst electrode 911 in the direction shown by an arrow 900 and isextracted from the substrate 111 side with a luminance corresponding toa video signal input from a signal line. When only the second electrode914 has light-transmitting properties, light passes the second electrode914 and is extracted from the sealing substrate 916 side with aluminance corresponding to a video signal input from a signal line. Whenboth the first electrode 911 and the second electrode 914 havelight-transmitting properties, light passes the first electrode 911 andthe second electrode 914 and is extracted from both the substrate 111side and the sealing substrate 916 side with a luminance correspondingto a video signal input from a signal line.

For example, the light-transmitting electrode is formed using alight-transmitting conductive metal oxide or formed to a thickness ofseveral nanometers to several tens of nanometers by using silver,aluminum, or the like. Alternatively, the light-transmitting electrodecan have a layered structure including a thin layer of metal such assilver or aluminum and a conductive metal oxide layer withlight-transmitting properties.

One of the first electrode 911 and the second electrode 914 that servesas the anode is preferably formed using a metal, an alloy, a conductivecompound, or the like that has a high work function (a work function of4.0 eV or more). The other of the first electrode 911 and the secondelectrode 914 that serves as the cathode is preferably formed using ametal, an alloy, a conductive compound, or the like that has a low workfunction (a work function of 3.8 eV or less). Typically, the electrodeserving as the cathode can be formed using an alkali metal, analkaline-earth metal, an alloy or a compound containing such a metal; ortransition metal (including a rare earth metal in its category).

The EL layer 913 includes the light-emitting layer. The EL layer 913 mayinclude a hole-injection layer, a hole-transport layer, anelectron-transport layer, and an electron-injection layer in addition tothe light-emitting layer. The hole-transport layer is provided betweenthe anode and the light-emitting layer. The hole-injection layer isprovided between the anode and the light-emitting layer or between theanode and the hole-transport layer. The electron-transport layer isprovided between the cathode and the light-emitting layer. Theelectron-injection layer is provided between the cathode and thelight-emitting layer or between the cathode and the electron-transportlayer. Note that all the hole-injection layer, the hole-transport layer,the electron-transport layer, and the electron-injection layer are notnecessarily provided, and a layer to be provided is selected asappropriate in accordance with a desired function or the like.

The light-emitting layer contains a light-emitting substance. As alight-emitting substance, a fluorescent compound that exhibitsfluorescence or a phosphorescent compound that exhibits phosphorescencecan be used, for example.

The light-emitting layer can be formed by dispersing a light-emittingsubstance in a host material. When the light-emitting layer is formed bydispersion of a light-emitting substance in a host material, it ispossible to suppress crystallization and concentration quenching inwhich quenching reaction occurs between light-emitting substances.

When the light-emitting substance is a fluorescent compound, a substancehaving singlet excitation energy (energy difference between a groundstate and a singlet excited state) higher than that of the fluorescentcompound is preferably used as the host material. When thelight-emitting substance is a phosphorescent compound, a substancehaving triplet excitation energy (the energy difference between a groundstate and a triplet excited state) higher than that of thephosphorescent compound is preferably used as the host material.

As the light-emitting substance dispersed in the host material, aphosphorescent compound or a fluorescent compound can be used.

Note that for the light-emitting layer, two or more kinds of hostmaterials and a light-emitting substance may be used, or two or morekinds of light-emitting substances and a host material may be used.Alternatively, two or more kinds of host materials and two or more kindsof light-emitting substances may be used.

As the hole-injection layer, a layer that contains a substance having ahigh hole-transport property and a substance having anelectron-accepting property can be used. The layer that contains asubstance having a high hole-transport property and a substance havingan electron-accepting property has a high carrier density and anexcellent hole-injection property. In addition, when the layer thatcontains a substance having a high hole-transport property and asubstance having an electron-accepting property is used as thehole-injection layer in contact with the electrode functioning as theanode, various kinds of metals, alloys, conductive compounds, mixturesthereof, or the like can be used regardless of the work function of amaterial of the electrode functioning as the anode

The light-emitting layer, the hole-injection layer, the hole-transportlayer, the electron-transport layer, and the electron-injection layercan be formed by an evaporation method, a coating method, or the like.

A passivation layer 915 may be formed over the second electrode 914 andthe partition 106 by a sputtering method or a CVD method. The placementof the passivation layer 915 can reduce deterioration of thelight-emitting element due to entry of moisture and oxygen into thelight-emitting element from the outside. A space between the passivationlayer 915 and the sealing substrate 916 may be filled with nitrogen, andfurther, a drying agent may be placed. Alternatively, a space betweenthe passivation layer 915 and the sealing substrate 916 may be filledwith a light-transmitting organic resin with high water absorbability.

When the light-emitting element emits white light, the substrate 111 orthe sealing substrate 916 can be provided with a color filter, a colorconversion layer, or the like so that full-color display can beperformed.

The substrate 111 or the sealing substrate 916 may be provided with apolarizing plate or a circular polarizing plate in order to enhance thecontrast.

With a combination of the pixel in this embodiment with the structure inany of Embodiments 1 to 3, it is possible to increase the aperture ratioof the pixel including a thin film transistor in which an oxidesemiconductor is used.

This embodiment can be implemented in combination with any of thestructures described in the other embodiments as appropriate.

Embodiment 5

In this embodiment, a circuit configuration of a pixel that can beapplied to a light-emitting display device will be described.

FIG. 8 illustrates an example of a pixel configuration that can beapplied to the light-emitting display device. A pixel 800 includes afirst thin film transistor 801, a second thin film transistor 802, acapacitor 803, and a light-emitting element 804. A gate of the firstthin film transistor 801 is electrically connected to a first wiring805. A first terminal of the first thin film transistor 801 iselectrically connected to a second wiring 806. A second terminal of thefirst thin film transistor 801 is electrically connected to a firstelectrode of the capacitor 803 and a gate of the second thin filmtransistor 802. A second electrode of the capacitor 803 is electricallyconnected to a power supply line 807. A first terminal of the secondthin film transistor 802 is electrically connected to the power supplyline 807. A second terminal of the second thin film transistor 802 iselectrically connected to one electrode of the light-emitting element804.

The first wiring 805 has a function similar to that of the first wiring101A in Embodiment 1. The second wiring 806 has a function similar tothat of the second wiring 102A in Embodiment 1. The power supply line807 has the same function as the power supply line 104A in Embodiment 1.The light-emitting element 804 has the same structure as thelight-emitting element described in Embodiment 4.

With a combination of the pixel in this embodiment with the structure inany of Embodiments 1 to 4, it is possible to increase the aperture ratioof the pixel including a thin film transistor in which an oxidesemiconductor is used.

This embodiment can be implemented in combination with any of thestructures described in the other embodiments as appropriate.

Embodiment 6

In this embodiment, an example of an electronic device including thelight-emitting display device described in any of Embodiments 1 to 5will be described.

FIG. 10A illustrates a portable game machine that can include a housing9630, a display portion 9631, a speaker 9633, operation keys 9635, aconnection terminal 9636, a recording medium insert reading portion9672, and the like. The portable game machine in FIG. 10A has a functionof reading a program or data stored in the recording medium to displayit on the display portion, a function of sharing information withanother portable game machine by wireless communication, and the like.Note that the portable game machine in FIG. 10A can have a variety offunctions without being limited to the above.

FIG. 10B illustrates a digital camera that can include the housing 9630,the display portion 9631, the speaker 9633, the operation keys 9635, theconnection terminal 9636, a shutter button 9676, an image receivingportion 9677, and the like. The digital camera having a televisionreception function in FIG. 10B has various functions such as a functionof photographing a still image and/or a moving image; a function ofautomatically or manually correcting the photographed image; a functionof obtaining various kinds of information from an antenna; and afunction of displaying the photographed image or the informationobtained from the antenna on the display portion. Note that the digitalcamera having the television reception function in FIG. 10B can have avariety of functions without being limited to the above.

FIG. 10C illustrates a television set that can include the housing 9630,the display portion 9631, the speakers 9633, the operation key 9635, theconnection terminal 9636, and the like. The television set in FIG. 10Chas a function of converting an electric wave for television into animage signal, a function of converting the image signal into a signalsuitable for display, a function of converting a frame frequency of theimage signal, and the like. Note that the television set in FIG. 10C canhave a variety of functions without being limited to the above.

FIG. 11A illustrates a computer that can include the housing 9630, thedisplay portion 9631, the speaker 9633, the operation keys 9635, theconnection terminal 9636, an external connection port 9680, a pointingdevice 9681, and the like. The computer in FIG. 11A can have a functionof displaying a variety of information (e.g., a still image, a movingimage, and a text image) on the display portion, a function ofcontrolling processing by a variety of software (programs), acommunication function such as wireless communication or wiredcommunication, a function of being connected to various computernetworks with the communication function, a function of transmitting orreceiving a variety of data with the communication function, and thelike. Note that the computer in FIG. 11A is not limited to having thesefunctions and can have a variety of functions.

FIG. 11B illustrates a mobile phone that can include the housing 9630,the display portion 9631, the speaker 9633, the operation keys 9635, amicrophone 9638, and the like. The mobile phone in FIG. 11B can have afunction of displaying a variety of information (e.g., a still image, amoving image, and a text image) on the display portion; a function ofdisplaying a calendar, a date, the time, or the like on the displayportion; a function of operating or editing the information displayed onthe display portion; a function of controlling processing by variouskinds of software (programs); and the like. Note that the functions ofthe mobile phone in FIG. 11B are not limited to those described above,and the mobile phone can have various functions.

FIG. 11C illustrates an electronic device including electronic paper(also referred to as an eBook or an e-book reader) that can include thehousing 9630, the display portion 9631, the operation key 9635, and thelike. The e-book reader in FIG. 11C can have a function of displaying avariety of information (e.g., a still image, a moving image, and a textimage) on the display portion; a function of displaying a calendar, adate, the time, and the like on the display portion; a function ofoperating or editing the information displayed on the display portion; afunction of controlling processing by various kinds of software(programs); and the like. Note that the e-book reader in FIG. 11C canhave a variety of functions without being limited to the above.

In the electronic device described in this embodiment, the apertureratio of a plurality of pixels included in the display portion can beincreased.

This embodiment can be implemented in combination with any of thestructures described in the other embodiments as appropriate.

This application is based on Japanese Patent Application serial No.2009-235180 filed with Japan Patent Office on Oct. 9, 2009, the entirecontents of which are hereby incorporated by reference.

The invention claimed is:
 1. A display device comprising: a first scanline; a second scan line; a signal line; a first pixel comprising afirst transistor, a first pixel electrode, and a part of the first scanline; and a second pixel adjacent to the first pixel, comprising asecond transistor, a second pixel electrode, and a part of the secondscan line, wherein, in the first transistor, a gate is electricallyconnected to the first scan line, and one of a source and a drain iselectrically connected to the signal line, wherein, in the secondtransistor, a gate is electrically connected to the second scan line,and one of a source and a drain is electrically connected to the signalline, wherein the first transistor comprises an oxide semiconductorlayer, the oxide semiconductor layer being over the first scan line witha gate insulating film therebetween, and wherein the oxide semiconductorlayer extends across a side edge of the first scan line, overlaps withthe second pixel electrode, and does not overlap with the first pixelelectrode.
 2. The display device according to claim 1, wherein the oxidesemiconductor layer is electrically insulated from the second pixelelectrode.
 3. The display device according to claim 1, wherein the oxidesemiconductor layer extends across the side edge of the first scan linein a channel width direction of the first transistor.
 4. The displaydevice according to claim 1, wherein the oxide semiconductor layerextends across the side edge of the first scan line in a channel lengthdirection of the first transistor.
 5. The display device according toclaim 1, wherein the first pixel further comprises a third transistor.6. The display device according to claim 1, wherein the display deviceis a light-emitting display device.
 7. The display device according toclaim 1, wherein the first scan line comprises a first regionoverlapping the oxide semiconductor layer and a second region notoverlapping the oxide semiconductor layer, and wherein a width of thefirst scan line at the first region and a width of the first scan lineat the second region are substantially same.
 8. A display devicecomprising: a first scan line; a second scan line; a signal line; afirst pixel comprising a first transistor, a second transistor, a firstpixel electrode, a light-emitting layer, and a part of the first scanline; and a second pixel adjacent to the first pixel, comprising a thirdtransistor, a second pixel electrode, and a part of the second scanline, wherein, in the first transistor, a gate is electrically connectedto the first scan line, and one of a source and a drain is electricallyconnected to the signal line, wherein, in the second transistor, a gateis electrically connected to one of the source and the drain of thefirst transistor, and one of a source and a drain is electricallyconnected to the first pixel electrode, wherein, in the thirdtransistor, a gate is electrically connected to the second scan line,and one of a source and a drain is electrically connected to the signalline, wherein the light-emitting layer is electrically connected to thefirst pixel electrode, wherein the first transistor comprises an oxidesemiconductor layer, the oxide semiconductor layer being over the firstscan line with a gate insulating film therebetween, and wherein theoxide semiconductor layer extends across a side edge of the first scanline, overlaps with the second pixel electrode, and does not overlapwith the first pixel electrode.
 9. The display device according to claim8, wherein the oxide semiconductor layer is electrically insulated fromthe second pixel electrode.
 10. The display device according to claim 8,wherein the oxide semiconductor layer extends across the side edge ofthe first scan line in a channel width direction of the firsttransistor.
 11. The display device according to claim 8, wherein theoxide semiconductor layer extends across the side edge of the first scanline in channel length direction of the first transistor.
 12. Thedisplay device according to claim 8, wherein the first scan linecomprises a first region overlapping the oxide semiconductor layer and asecond region not overlapping the oxide semiconductor layer, and whereina width of the first scan line at the first region and a width of thefirst scan line at the second region are substantially same.
 13. Thedisplay device according to claim 8, wherein the first pixel furthercomprises a first wiring, wherein the first wiring is in contact withthe oxide semiconductor layer and is electrically connected to thesecond transistor, wherein at least a part of the first wiring overlapsthe first scan line.
 14. The display device according to claim 8,wherein the first pixel further comprises a first wiring and a secondwiring, wherein the first wiring is in contact with the oxidesemiconductor layer and is electrically connected to the second wiring,wherein the first scan line and the second wiring comprise the samematerial, and wherein the second wiring is configured to be the gate ofthe second transistor.
 15. The display device according to claim 14,further comprising a power source line, wherein the second wiring doesnot overlap the power source line.